Job Description

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today\'s innovators stay Ahead of What\'s Possible. The Central IP&DS team within Analog Devices Inc. is responsible for developing, curating, and providing reusable strategic Analog/Mixed-signal and digital IPs to Business Units to accelerate product development across the company. The team is looking for an experienced Mixed-Signal Design Verification Engineer who will be responsible to producing fully functional first silicon IP/SoC designs. The responsibilities would include all aspects of Mixed-Signal Design Verification, establishing robust MS-DV methodologies for IP reuse, test-plan development, scalable verification environment development, test generation, debug, coverage, sign-off and ensure seamless integration of IPs into ADI\'s products. Responsibilities: Drive IP-level AMS/DMS verification as well as the integration of Analog, Digital and Mixed-Signal IP blocks at top-level Responsible for the generation, verification, and optimization of behavioral models of Analog blocks dedicated to mixed-signal verification Work closely with design and architecture teams to ensure that the developed models are adequate functional models. Implement Mixed-Signal testbenches, checkers and tests using System Verilog Communicate with design team to resolve issues found during verification. Qualifications: BSEE/MSEE with 5+ years of industry experience in pre-silicon mixed signal verification Proficiency in modeling analog circuits with System Verilog (including RNM), VerilogAMS, or SystemC. Experience with circuit design, simulation, and verification. Experience with Perl, Python, Tcl, Skill, C/C++ Strong proficiency with AMS Designer Familiarity with EDA tools such as Virtuoso, Spectre, Xcelium, etc. Familiarity with System Verilog and UVM Experience with system and chip-level DV closure is desirable Knowledge on post-silicon bring-up and ATE support is desirable Strong communication skills are a must, as the candidate will interface with a lot of different groups within the company Ability to work well in a team and be productive under tight schedules Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

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