Job Description

Company OverviewProxeleras unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone through a partnership with TechLink Global Ltd. Proxeleras presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. We are headquartered in Bangalore and have a strategic partnership with Israel, aiming to strengthen the semiconductor technology and ecosystem. For more information, visit .Job OverviewWe are seeking a mid-level Static Timing Analysis (STA) Engineer for our Bangalore or Hyderabad office. The ideal candidate will have a minimum of 4 years of work experience in relevant fields. This role involves working in high-paced environments and contributing to our next wave of technological advancements.Qualifications and Skills

• Minimum of 4 years of experience in VLSI design and STA engineering.
• Proficiency in Static Timing Analysis (Mandatory skill).
• Experience with Synthesis processes (Mandatory skill).
• Experience with Scripting languages such as Tcl, Perl, and Python (Mandatory skill).
• Knowledge in Timing Closure and strategies for achieving it.
• Expertise in Clock Domain Crossing techniques and considerations.
• Experience in Physical Design aspects of VLSI circuits.
• Proficiency in Verilog and RTL Design.

• Perform comprehensive Static Timing Analysis (STA) for VLSI designs to ensure timing closure and integrity.
• Work on synthesis optimization to meet design specifications and performance benchmarks successfully.
• Develop and maintain scripts using Tcl, Perl, or Python for automation of analysis and reporting.
• Collaborate with the Physical Design team to meet design constraints and requirements.
• Evaluate and implement Clock Domain Crossing techniques to ensure signal integrity and performance.
• Identify timing issues and propose corrective measures for timing closure.
• Create detailed reports and documentation for STA and other related processes.
• Provide technical support and guidance to junior engineers and other team members.

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