Sta Engineer | 4 To 6 Years | Bengaluru&hyderabad
Job Description
STA (Static timing analysis) Engineers: : Experience in Synthesis of complex SoCs block/ top level and writing timing constraints. Experience in formal verification RTL to netlist - to- netlist with DFT constraints. Experience in post-layout STA closure and timing ECOs. Worked in technology nodes 45 nm and below. Knowledge of low -power aware implementation is a plus. Tools: Design compiler, RTL compiler, LEC, CLP, ETS/ PTSI/ GT. Primary Skills: Able to handle Soc/Subsystem and blocklevel synthesis activities , Soc/Subsystem and blocklevel LEC, CLP and timing closure Secondary Skills: Able to handle PTPX and debug CTS issues to balance clocks
Monster
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Job Detail
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Job IdJD3023947
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IndustryNot mentioned
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Total Positions1
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Job Type:Full Time
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Salary:Not mentioned
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Employment StatusPermanent
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Job LocationBangalore, Karnataka, India
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EducationNot mentioned
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ExperienceYear