Job Description

Intel NEX Cloud Networking (NCNG) team delivers best-in-class Ethernet products and is at the heart of Intel\'s transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. NCNG\'s compelling Ethernet products move the world\'s data and are the foundations of cloud service and telecommunications data centers. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we\'re looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you\'re ready to be a part of this journey, then we want to hear from you Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Valid ation teams in improving postsilicon test content and providing feedback for future on-die debug features. : As a Validation Engineer, you will be part of the Silicon Engineering Team, developing high performance Packet Processing Silicon. You would be working on system and platform level validation on Foundational Ethernet Solutions (FNIC SoC\'s), Smart NIC\'s that intelligently manage system-level resources by securely accelerating networking and storage infrastructure functions in a data center. You will be a key member of the silicon validation team responsible for ensuring that we deliver high-quality silicon to customers. Be responsible for developing the integration, validation plan and developing and implementing necessary tests for validation. Develop detailed test plans, based on design specifications and coordination with a cross-functional team (e.g., architecture, design, software, firmware). You will own the laboratory debug of failures with cross-functional teams (Silicon, Boards, Software, Manufacturing, PPV) and contribute into the deep dive debug of the issues. As part of this role, you will plan, write and execute tests to establish functional health of our ASICs, both under nominal and PVT conditions. You will develop test cases that executes concurrent scenarios and induces stress on different domain and parts of the silicon to ensure the Si performance and validate different features. Tasks will include understanding the Product System Requirements, defining test specifications, creating System Level Test Plan, design, develop, operate, and maintain software based validation tests and perform pre/post validation with laser sharp focus on Silicon quality assurance through validation coverage. Participate in validation plan staging to emulation model, silicon availability schedule, prioritizing the test cases for the respective milestone , validation driver and firmware coordination, cross and virtual platforms usage, emulation prototyping , silicon bring-up activities. Integrate and validate complex hardware and software designs in pre-silicon through functional bring-up. Perform long-term system characterization and debug and root-cause failures. Provide feedback to improve features like power management quality, performance, and reliability through generations of designs including pre-silicon prototyping platforms as well as post-silicon bring-up and production. Qualifications Senior System Validation Engineer - Responsibilities: Ownership of pre/post-silicon validation of system as well as specific domain including both HW and SW. Scope , develop and execute comprehensive validation plans for our custom silicon. Develop automation software and scripts for measurement data collection and analysis. Develop, implement test cases , review implementations and provide feedback, drive quality and performance efforts. Contribute for device boot/silicon bring-up, debug, and feature development. Escalate technical issues and risks, with appropriate data, to management to take immediate actions Drive the debug and resolution of engineering issues between cross-functional teams. Understand intended features and stress scenarios from a customer perspective and develop test scenarios accordingly. Demonstrate results with technical solutions Senior System Validation Engineer - Qualification Have demonstrated strong packet processing experience, silicon, system and functional testing, as well as good understanding of emulation, firmware and software stack know how experience. Possess an in-depth understanding of hardware architectures, system level IC design implementation, and knowledge of how to create end use scenarios Strong technical background in FPGA prototype emulation, and debug Strong technical background in silicon validation, failure analysis and debug Understanding Design with RTL coded in Verilog/System Verilog is a must Good knowledge of validating system level designs based on embedded processors and peripherals such as SPI, I2C, UART, JTAG Prior hands-on automation script development and optimization (using C/C++, Python). Well versed in the usage of advanced lab equipment (scopes, BERTs, programmable power supplies, PCIe Analyzers etc). Proven analytical and problem-solving abilities. Knowledge and experience in embedded firmware debug and development is big plus. Good understanding of embedded firmware/software development process is a plus. Good knowledge and experience in JTAG, Debug Access and Tools. Good experience in architectural and design aspects of the validation tests suite development. Great team player, highly motivated to support the team with technical expertise and hands on experience in validation test cases development and debug. Excellent communication and leader ship skill. Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware. 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby, D ynamic) 3+ years of experience with Linux Shell Scripting, Linux Kernel Programming 3+ years of the Hardware design and Hardware Validation Capabilities Bachelor\'s or Master\'s degree in EC/EE/CS with 10-15 years of experience Inside this Business Group The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It\'s leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel\'s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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