:WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences \xe2\x80\x93 the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world\xe2\x80\x99s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.AMD together we advance_SENIOR SILICON DESIGN ENGINEERTHE ROLE:As a member of the System IP Group, you will help bring to life cutting-edge designs.As a member of the front-end design integration/verification team, you will work closely with the architecture, IP design, SOC, and product engineers to achieve first pass silicon success.THE PERSON:A successful candidate will work with IP design and SOC DV engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.KEY RESPONSIBILITIES:Integration and verification of complex System IP features.Compose test plan and validation vectors to ensure functional completenessBuild test bench and monitors for DUTBuild C/C++/UVM model for simulationWork closely with RTL designers and SOC team to scope out integration and verification requirements.PREFERRED EXPERIENCE:Prefer 4 or more years of experience in the ASIC design and verification industry. Should be familiar with industry standard integration flows.Familiar with Linux Environment (including shell scripting and Linux GNU tools)Experience with design for verification (assertion-based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)Should be versatile in any one of the high-level verification flows such as SV, UVM, C++, etc., as well as knowledge of industry standard tools for verificationExperience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL designACADEMIC CREDENTIALS:
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