Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Sr. Principal Design Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world\'s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence\'s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique \'One Cadence - One Team\' culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day. Job Summary: Drives development of products and technologies and has material responsibility for the success of that product/technology. Job responsibilities Architect, develop, champion, and implement metric-driven mixed-signal verification solutions, in the areas of: Digital/DMS/AMS testbench creation and generation Automatic Model generation and testing Cadence Design Systems AMS simulation flows Mixed-Signal Assertions and Checkers Behavioral Modeling and Model Validation Methodologies Mixed-Signal VIP integration and testing Mixed-Signal emulation flows and practices Power intent verification including Low power states, state retention and CPF/UPF integration Push technology for mixed-signal modeling, simulation and DV in order to improve mixed signal verification efficiency and accuracy. Ensure scalable mixed-signal DV solutions to cover the breadth of IPG offerings including SerDes, DDR, A2D converters and custom solutions Drive adoption of analog behavioral modeling methodologies for efficient mixed-signal verification Develop efficient debug solutions and techniques Develop efficient and accurate full stack mixed signal methodology for entire IP stack from controller to analog circuit. Mentor junior engineers Collaborate closely with Digital, Analog, Firmware and Test engineers Internal methodology and tool development teams, such as, Virtuoso/ADE/Xcelium. PDK teams and Customer management and engineering support teams Experience and Technical Skills required 7-15+ Years\' experience in working with Digital and Analog mixed-signal environment and teams. Must have good written and verbal cross-functional communication skills. Proven experience in most of the following: Creating Verification infrastructure (test-bench, environment, scripting) Scripting of verification flows, design automation Debugging verification testcases Knowledge of existing and upcoming standards such as PCIE, USB, DDR4 etc. Must be comfortable interacting across the IPG development team including the ability to understand design constraints. Knowledge of Mixed-Signal Cadence tools and mixed signal methodology is a plus Knowledge of SystemVerilog and UVM Test environment and methods is a plus Working knowledge of revision control tools such as SOS, SVN is a plus Education Level : Bachelor\'s Degree (MSEE Preferred) Regards K Madhu Prasad (Madhu Reddy) Hiring Team | We\'re doing work that matters. Help us solve what others can\'t.

foundit