Job Description

Senior Verification Application Engineer. Location- Bangalore Synopsys is looking for Senior Verification Applications Engineers (AE). AE\'s will work with various customers. This opportunity provides abundant exposure to different design styles and verification methodologies used in the semiconductor industry. This position allows you to learn the state-of-art verification flows/methodology from Synopsys. You will hone your leadership skills in driving technology campaigns. This position plays a role in account planning. Work as part of the account team to develop solutions to customer problems based on needs and issues. You will be part of a team managed by the India Verification AC Manager. Requirements: Typically requires a minimum of 4 to 8 years of related experience Understanding of Verification methodologies, flows Proficient with Simulation/Debug/LP verification methodologies, HDL (Verilog/VHDL/System Verilog), Testbench Methodologies (OVM/UVM) Solid understanding of design flows, VLSI, and/or CAD-engineering. Adept in using standard scripting languages like TCL and PERL Proficiency in industry standard protocols like Ethernet/PCIe/HDMI and AMBA OR SoC Verification. Excellent customer interface, negotiation, communication and planning skills Ability to drive complex tasks to completion consistent with program schedule and cost constraints. Good team player At Synopsys, we\'re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we\'re powering it all with the world\'s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips-faster. We\'re the world\'s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.

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