Job Description

Job Details::Responsibilities :As Validation Engineer, you will drive the planning, test cases creation by reading multiple technical specifications, validation, and debug of various hardware IPs (Intellectual Property) as well as supporting the debug experiments and functional tests with next generation hardware IPs for Intel. The Pre-Si validation will happen on standard FPGA based HW platform while Post-Si validation will happen on Intel Test Chips and Intel HW platforms.Qualifications:Preferred Experience & Skill set:

• Experience in Pre (+Post) Si functional validation
• Strong programming (C/C++) skills and Automation scripting (Python, Perl) expertise
• Extensive protocol knowledge of CAN/TSN/Ethernet/I2C/SPI/UART and any one of HSIO (PCIe/USB/DDR)
• Extensive experience with board/platform-level (Hardware & Software) debug
• Extensive experience with HW debug techniques and methodologies (FPGA and ASIC)
• Extensive experience with common lab equipment debug tools including JTAG, Logic Analyzer, Oscilloscope, etc.

Responsibilities include:

• Reading, Defining, documenting, executing and reporting the overall functional test plan and verification strategy for IPs

• Supporting the debug of IP functional failure found during Pre and Post-Silicon validation, bring-up and production phases of Silicon programs
• Lab-based silicon bring-up and validation focused on the functionality
• In-Depth testing of IP features using troubleshooting methods, software tools, protocol/logic analyzers, oscilloscopes and other test equipment
• Engaging in system-level debug/triage efforts
• Leading collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives
• Continuous improvement and developing knowledge of system architecture/debug of IPs
• Supporting debug effort for defects found on customer platforms as requested by customer support teams
• Driving technical innovation to enhance capabilities in IP functional validation, including tool and script development, and organization level technical initiatives
• Python expertise and FPGA Prototyping knowledge

Minimum Qualifications:
Masters or B.E / B.tech in Computer Architect/VLSIRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type: Experienced HireShift: Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust N/AWork Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Intel