Job Description

Required Qualifications:Bachelor's or Masters in Electrical or Computer Engineering or related field with 10+ years of experienceExperience in tape outs of complex ASICs in leading edge technologyPreferred Qualifications:Strong expertise in one or more of the following: synthesis, floorplanning, placement, clock/power grid construction, routing, low power methodologies, and signoff steps (FV, LPV, Extraction, STA, EMIR, Physical Verification, Power Analysis)Strong scripting skillsProven experience in creating and delivering hard macros and knowledge of guidelines for their integration in SoCsGood understanding of foundry tech files and rule decksResponsibilitiesAs a Physical Design Engineering Manager you will be responsible for leading a team to complete Physical Design tasks at block, sub-chip, and/or full-chip level. The tasks will include Floorplanning, Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM. You may also lead team members in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection.RequirementsStrong expertise in one or more of the following: synthesis, floorplanning, placement, clock/power grid construction, routing, low power methodologies, and signoff steps (FV, LPV, Extraction, STA, EMIR, Physical Verification, Power Analysis)Strong scripting skillsProven experience in creating and delivering hard macros and knowledge of guidelines for their integration in SoCsGood understanding of foundry tech files and rule decks

Alwyn Global