Do you like to challenge yourself and figure innovative solutions to problems and translate them to efficient code? If the answer is yes, then come work with us on the next generation synthesis solution technology where you will be working and learning about various aspects of RTL synthesis technology, logic optimizations, boolean optimizations, power synthesis. You should be able to completely own and drive the design and development of pieces of RTL synthesis.
Must Requirements:
5+ years of experience in software development
B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college.
Good knowledge of C++, algorithm and data structures
Good problem solving and analytical skills
The person should be self-motivated and can work independently.
Should be able to guide and lead others, towards project completion.
Good to have
Knowledge of Verilog, System Verilog, VHDL.
Understanding of gate level digital logic design.
Experience in parallel algorithms, job distribution.
Knowledge of scripting languages (Python, Tcl, Perl) would be useful.
Experience in compiler/simulator development.
Job location:
Noida / Bangalore
# LI-EDA #DISW
Organization: Digital Industries Company: SIEMENS EDA (INDIA) PRIVATE LIMITED Experience Level: Experienced Professional Full / Part time: Full-time
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