Job Description

PDK library validation is the primary responsibility across process nodes. PDK Library validation covers collaterals and partition cells and 3DIC packaging, back end physical design checks. Automation of QA Methodologies is a key requirement to scale up QA Coverage. Filing tickets on issues, tracking, following up with development teams, fixing verification, and interfacing with QA partners, PDK teams, EDA vendors, and design service partners is a day-to-day job function.
Qualifications

Candidate should have good experience in PDK Library QA of Back End flows for SOC/partition, 3DIC packaging, and frame design methodology OR SOC/ASIC/Custom PnR methodologies plus knowledge of extraction flow is required. Must have worked on Innovus and Fusion compiler APR flows. Automation knowledge in SKILL/Shell/TCL/Perl/python and other scripting languages is desired. Good written and verbal communication skills. Experience: B.E./B.Tech/M.Tech + 3 Years relevant experience. Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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