Job Description

Minimum qualifications: Bachelor\'s degree in Electrical Engineering or equivalent practical experience 6 years of experience working with computer architecture/memory subsystem architecture Preferred qualifications: Master\'s degree in Electrical Engineering, Computer Engineering or Computer Science Understanding in computer architecture/memory subsystem architecture Apply engineering best practices (e.g., code review, testing, refactoring) to the design and implementation of ASIC blocks About the job Our computational challenges are so big, complex and unique we can\'t just purchase off-the-shelf hardware, we\'ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google\'s services. As a Hardware Engineer, you design and build the systems that are the heart of the world\'s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users. With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors. Google\'s mission is to organize the world\'s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people\'s lives better through technology. Responsibilities Oversee the architecture, design and implementation of digital logic using Chisel, Verilog, and/or SystemVerilog. Take leadership role on technical project teams and setting technical direction. Engage with Machine Learning System Architects and Software teams to define specifications. Engage with Verification and Silicon Validation teams to ensure functionality of the design.

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