Requirement :- Proficiency in Digital Electronics- Expertise in Verilog and System Verilog (SV)- Familiarity with Verification Methodologies such as UVM/OVM- Proficient coding skills in Verilog and SV- Strong analytical, problem-solving, and debugging abilities- Effective communication and interpersonal skillsQualification :- Bachelor\'s or Master\'s degree in Electrical/Electronic Engineering, Computer Engineering.- Trained in VLSI Design & VerificationExperience : Fresher\'s - 3 yearsYear of Graduation:- B.E/B.TECH (2021 or older)- M.E/ M.TECH (2023 or older)
Engineeristic
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